List of Articles Flip-flop

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  1 - Analysis and Evaluation of the Effect of Design Parameters on Timing Parameters and Power Consumption of Static Flip-Flop in 16 nm Technology Node
  E. Mahmoodi Morteza Gholipour
  Flip-flop is one of the important elements in the digital circuit’s design, which its performance affects the speed and power of the system. In this paper, appropriate simulations are used to obtain the timing parameters of the static flip-flop and investigate the effec More

  Flip-flop is one of the important elements in the digital circuit’s design, which its performance affects the speed and power of the system. In this paper, appropriate simulations are used to obtain the timing parameters of the static flip-flop and investigate the effect of the width of different transistors on these parameters. Then, the effects of the supply voltage and manufacturing process parameters variation on the performance of the flip-flop are investigated. The widths of transistors are determined based on the desired energy-delay product (EDP) and power-delay product (PDP) for these two cases separately. Then, the effect of voltage variations on the increase of EDP and PDP are investigated compared to the base flip-flop. We used a static D-type flip-flop in our simulations. The simulations were performed using the HSPICE in 16 nm technology node at 1 GHz frequency. Manuscript profile
• Open Access Article
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  2 - Design of New Ternary Flip Flops Using CNTFET in Nanotechnology
  katayoun rahbari seyed ali hosseinoi
  Using multi-valued logic can reduce chip interconnections, which can have a direct effect on chip area and interconnections power consumption. In recent years, due to the ability of Nano electronics in the design of multi-level circuits, research in this field has flour More

  Using multi-valued logic can reduce chip interconnections, which can have a direct effect on chip area and interconnections power consumption. In recent years, due to the ability of Nano electronics in the design of multi-level circuits, research in this field has flourished. The sequential circuits, flip-flops are important components of processors and VLSI circuits. In this paper, for the first time, a ternary flip-flop with a pulse generator has been proposed, and also a ternary binary-decode flip-flop and the first flip-flop using a buffer have been introduced. Then these flip-flops are compared with themselves and previous circuits. Also, these flip-flops have been used in the design of the ternary counter. The simulation results with HSPICE software show the correct performance of the proposed circuits. There is a 20% improvement in delay and a reduction in the number of transistors in the STI pulse generator flip-flop model, 30% in the SP flip-flop, and 30% in the buffer flip-flop. Also, in the comparison table, the advantages and disadvantages of each have been examined. Manuscript profile