محاسبه زمان نشست و SR تقویت‌کننده‌های عملیاتی دوطبقه CMOS با جبران‌سازی کسکود
محورهای موضوعی : مهندسی برق و کامپیوترحنانه غلام نتاج 1 , حبیب اله آدرنگ 2 , سیدصالح محسنی 3 , سیدصالح قریشی 4
1 - دانشگاه آزاد اسلامی واحد نور
2 - دانشگاه آزاد اسلامی واحد نور
3 - دانشگاه آزاد اسلامی واحد نور
4 - دانشگاه آزاد اسلامی واحد نور
کلید واژه: زمان نشست, نرخ چرخش, اسلویینگ, جبران‌سازی کسکود, تقویت‌کننده عملیاتی و پاسخ پله,
چکیده مقاله :
زمان نشست و نرخ چرخش، یکی از پارامترهای مهم در آپ‌امپ‌های فیدبک‌دار است. در این مقاله زمان نشست و نرخ چرخش در تقویت‌کننده دوطبقه تمام تفاضلی CMOS با جبران‌سازی کسکود مورد تحلیل قرار می‌گیرد. ویژگی تحلیل ارائه‌شده آن است که رفتار ترانزیستورها پس از اعمال پله در ورودی به طور دقیق‌تر مورد بررسی قرار می‌گیرد و نشان داده می‌شود که زمان نشست و همچنین نرخ چرخش به اندازه پله ورودی وابستگی دارد. تحلیل انجام‌شده می‌تواند برای طراحی و محاسبات دستی در مدارهای مجتمع مفید واقع شود. همچنین جهت بررسی اعتبار و دقت تحلیل ارائه‌شده، شبیه‌سازی‌های مختلفی انجام شده که تطابق عالی بین مدل تحلیلی ارائه‌شده و نتایج شبیه‌سازی را نشان می‌دهد.
Slew rate and settling time are the important parameters in opamps with feedback. In this paper, the slew rate and settling time of the fully differential two stages folded cascade architecture amplifier with cascade compensation is analyzed. An important characteristic of the proposed analytical model is that the behavior of the transistors is examined in detail after applying the step in the input, and it is shown that the settling time as well as slew rate would depend on the size of the input step. The performed analysis can be beneficial for design and manual calculations in integrated circuits. Moreover, circuit level simulation is used to validate the analytical results with particular emphasis on slew rate and settling time. Simulations results show excellent conformance between the analytical equations and the simulation results.
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