جمع‌کننده نافرار و توان پایین مبتنی بر فناوری اسپینترونیک برای پیاده‌سازی محاسبات در حافظه
الموضوعات :عبداله امیرانی 1 , کیان جعفری 2 , رامین رجایی 3
1 - دانشگاه شهید بهشتی
2 - دانشگاه شهید بهشتی
3 - دانشگاه شهید بهشتی
الکلمات المفتاحية: پیوند تونل مغناطیسیطراحی توان پایینفناوری اسپینترونیکمحاسبات در حافظهمدارهای ترکیبی MTJ/CMOS,
ملخص المقالة :
با پیشرفت فناوری و کوچک‌شدن اندازه ترانزیستورها به خصوص در فناوری‌های زیر 90 نانومتر مصرف توان ایستای بالا به علت افزایش نمایی جریان نشتی ترانزیستورها به یکی از بزرگ‌ترین مشکلات مدارهای مبتنی بر فناوری CMOS تبدیل شده است. افزاره‌های اسپینترونیک مانند پیوند تونل مغناطیسی (MTJ) با توجه به ویژگی‌های منحصربه‌فردشان از جمله مصرف توان ایستای پایین، نافراربودن، طول عمر زیاد، سازگاری با ترانزیستور‌های CMOS و امکان ساخت در چگالی‌های بالا یکی از گزینه‌های مورد توجه برای طراحی مدارهای ترکیبی MTJ/CMOS و غلبه بر معضل مصرف توان ایستای بالا در مدارهای مبتنی بر فناوری CMOS است. در این مقاله یک تمام جمع‌کننده ترکیبی MTJ/CMOS کاملاً نافرار و توان پایین برای پیاده‌سازی محاسبات در حافظه ارائه شده است. نتایج شبیه‌سازی‌ها نشان می‌دهد که تمام جمع‌کننده نافرار پیشنهادی نسبت به تمام جمع‌کننده‌های نافرار موجود حداقل 50 درصد سریع‌تر بوده، حاصل‌ضرب توان در تاخیر آن 39 درصد کمتر است و سربار سخت‌افزاری زیادی نیز به مدار تحمیل نمی‌کند.
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