Design and Implementation of an Ultra-Wide Band, High Precision, and Low Noise Frequency Synthesizer
الموضوعات :Yas Hosseini Tehrani 1 , Nasser Masoumi 2
1 - Sharif University of Technology
2 - Univeristy of Tehrani
الکلمات المفتاحية: frequency synthesizer , wide band , high precision , low power , phase-locked loop(PLL),
ملخص المقالة :
This paper presents system-level design and implementation of an ultra-wide tunable, high precision, fast locking, low phase noise, and low power portable fractional-N frequency synthesizer. The output frequency of the proposed design is ranged from 54 MHz to 6.8GHz. The VCO cores cover frequencies from 3.4GHz to 6.8GHz. The programmable output dividers allow generation of the lower frequencies. The frequency resolution of the implemented system is ±20 parts per million (ppm) over -40/85ºC. The output power is tunable between -4dBm and +5dBm. The implemented system has a phase adjust feature that allows shifting of the output phase in relation to the reference oscillator ranged from 0° to 180°. It can generate a wide range, high precision, and linear frequency sweep. The sweep rate, frequency step, and frequency range are tunable. The new frequency tuning algorithm, named Yas algorithm, is proposed to improve frequency precision of the synthesizer. To demonstrate the efficiency of the Yas algorithm, the simulation result MATLAB and the experimental measurements are presented. The system consumes 300mA; therefore, it can be powered by Li-Ion battery. The output phase noise is -95.55 dBc/Hz at 1KHz offset from 3GHz. The experimental measurement results demonstrate that the implemented frequency synthesizer can be used for applications, such as oscillator of spectrum analyzer, automatic test equipment, FMCW radars, high-performance clock source for high speed data converter
[1] K.A. Efstathiou, G. Papadopoulos, and G. Kalivas, “High Speed Frequency Synthesizer Based On PLL”, in Proc. Third IEEE international Conference,Oct. 1996.#
[2] C. Weltin-Wu, G. Zhao, and I. Galton, “ A 3.5GHz Digital Fractional-N PLL Frequency Synthesizer Based on Ring Oscillator Frequency-to-Digiral Conversion”, in IEEE Journal of Solid-State Circuits, Nov. 2015.#
[3] M. Tamaddon, M. Ataei, and A. Nabavi, “ Design of a PLL based frequency synthesizer for WiMaX applications”, in IEEE 18th Iranian Conference on Electrical Engineering, 2010.#
[4] H. Li, L. Qian, and M. Xiang-hua, “ A Design of Frequency Synthesizer based on the PLL method”, in IEEE 3rd International Conf, Jul. 2010.#
[5] Z. Shu, K. Lee, and V. H. Leung, “ A 2.4-Ghz ring-oscillator-based CMOS frequency synthesizer with a fractional divider dual-PLL architecture”, in IEEE Journal of Solid-State Circuits, Vol.30, March, 2004.#
[6] Q. Zou, K. Ma, and K. Yeo, “ A Low Phase Noise and Wide Tuning Range Millimeter-Wave VCO Using Switchable VCO-Cores”, in IEEE Transaction on Circuit and System, Vol. 62, No. 2, Feb. 2015.#
[7] K. Kuo and C. Wu, “ A 802.15.41 Wide Band Frequency Synthesizer for 5GHz ISM Band Health Care Applications”, in IEEE International Symposium on Bio electronics on Bioinformatics, 2014.#
[8] K. Woo, Y. Liu, E. Nam, and D. Ham. “ Fast-Lock Hybrid PLL Combining Fractional-N and Integer-N Modes of Differing Bandwidths”, in IEEE Journal of Solid-State Circuits, Vol. 43, No. 24, Feb. 2008.#
[9] S. Sahnoun, A. Fakhfakh, and N, Masmoudi, “ Fast and Accurate Behavioral Simulation of Fractional-N Frequency Synthesizer for Optimization of the Lock Time”, in Proc. ICM, Dec. 2011.#
[10] O. Abdelfahhah, I. Shih, and G. Robers, “ Analytical Comparison between Passive Loop Filter topologies for Frequency Synthesizer PLLs”, in IEEE New Circuits and Systems Conference, Ju. 2013.#
[11] Y.Linn, “Simple and Exact Closed Form Expressions for the Expectation of the Linn-Peleg M-PSK Lock Detector”,in IEEE Pacific Rim Conference, Aug. 2007.#
[12] F. WenJun, J. JingShan, W.ShuanRong, and L.Luan, “Design and Performance Evaluation of Carrier Lock Detection in Digital QPSK Receiver”, in IEEE International Conference, Vol. 7, Jun. 2006.#
[13] Analog Device, “Microwave Wide band Synthesizer with Integrated VCO”, ADF5355 datasheet.#
[14] Liu, L. Tian, and W. Hong, “Ultra-broadband, High Resolution Frequency Synthesizer for LTE Radio Channel Emulator”, in IEEE Asia-Pacific Conference on Antennas and Propagation, Jul. 2014.#
[15] J. Shin and H. Shin, “A 1.9-3.8 GHz Sima-delta Fractional-N PLL Frequency Synthesizer With Fast Auto Calibration of Loop Bandwidth and VCO Frequency”, in IEEE Journal of Solid-State Circuits, Jul. 2014.#
[16] L. Yang, L. Tian, and W. Hong “An Ultra-broadband, High Resolution Frequency Synthesizer”, in Microwave and Millimeter Wave Technology International Conference, 2012.#
[17] T. Netsu, M. Taniguchi, and H. Ishida, “ Thermal Analysis of Printed Circuit Board Due to Thermal Stress By Using Tomography and Holography”, in IEEE Instrumentation and Measurement Technology Conf, 2005.#
[18] J. Nicolics, M. Mundlein, and G. Hanreich, “ Thermal Analysis of Multi layer Printed Circuit Boards with Embedded Carbon Black-Polymer Resistors”, in IEEE International Spring Seminar on Electronics Technology Conference, 2007.#
[19] B. Valle, “An Area and Power-Efficient Analog Li_Ion Battery Charger Circuit”,in IEEE Transaction on Biomedical Circuits and System, vol. 5, April. 2011.#
